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integrated, precision battery sensor for automotive systems data sheet ADUCM330 / aducm331 rev. c document feedback information furnished by analog devices is believed to be accurate and reliable. however, no responsibi lity is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062 - 9106, u.s.a. tel: 781.329.4700 ? 2015 analog devices, inc. all rights reserved. technical support www.analog.com features high precision anal og - to - digital converters (adcs) dual channel, simultaneous sampling i - adc 20 - bit - (minimizes range switching) vadc/tadc 20 - bit - pro grammable adc conversion rate from 1 hz to 8 k hz o n - chip 5 ppm /c voltage reference current channel fully differential, buffered input programmable gain (from 4 to 512) adc absolute input range: ?200 mv to +300 mv digital comparator with current accumulator feature vo ltage channel buffered, o n - chip attenuator for 12 v battery input temperature channel external and on - chip temperature sensor options microcontroller arm cortex - m3 32 - bit processor 16.384 mhz precision oscillator with 1% accuracy serial wire download (swd) port supporting code download and debug automotive qualified integrated local interconnect network (lin) transceiver lin 2.2 - compatible slave, 100 kb fa st do wnload option sae j - 2602 - compatible slave low electromagnetic emissions (eme) high electromagnetic immunity (emi) memory 96 kb ( ADUCM330 )/128 kb ( aducm331 ) flash/ee memory, ecc 6 kb sram, ecc 4 kb data flash /ee memory, ecc 10,000 cycle flash/ee endurance 20 year flash/e e retention in circuit download via swd and lin on - chip peripherals serial po rt interface (spi) general - purpose input/output (gpio) port general - purpose timer wake - up timer watchdog timer on - chip, p ower - on reset power operates directly f rom 12 v battery supply power consumption, 8 ma typical (16 mhz) low power monit or mode package and temperature range 32- lead, 6 mm 6 mm lfcsp fully specifie d for ?40c to +115c operation; additional specifications for 115c to 125c qualified for automotive applications applications battery sensing/management for automotive and light mobility vehicles lead acid battery measurement for power supplies in industrial and medical domains functional block dia gram 20-bit adc pga buf iin+ iin? result accumulator digital comparator 20-bit adc mux buf swdio swclk vdd 33vdd avdd18 dvdd18 agnd dgnd vss io_vss gpio5/lc_tx/lin_tx gpio4/irq1/lc_rx/ eclkin/lin_rx gpio3/irq0/mosi/ lc_tx/lin_tx gpio2/miso gpio1/sclk/lin_tx gpio0/cs/lin_rx vbat vtemp gnd_sw precision analog acquisition cortex-m3 processor 16mhz prec osc 1% lpm 1 gp timer wd timer w/u timer gpio port spi port lin lin ldo por memory 96kb (ADUCM330)/ 128kb (aducm331) flash, 6kb sram, 4kb data reset temperature sensor precision reference ADUCM330/aducm331 11153-004 figure 1.
ADUCM330/aducm331 data sheet rev. c | page 2 of 16 table of contents features .............................................................................................. 1 ? applications ....................................................................................... 1 ? functional block diagram .............................................................. 1 ? revision history ............................................................................... 2 ? general description ......................................................................... 3 ? specifications ..................................................................................... 4 ? absolute maximum ratings .......................................................... 10 ? esd caution ................................................................................ 10 ? pin configuration and function descriptions ........................... 11 ? terminology .................................................................................... 13 ? applications information .............................................................. 14 ? design guidelines ...................................................................... 14 ? power and ground recommendations ................................... 14 ? exposed pad thermal recommendations .............................. 14 ? general recommendations....................................................... 14 ? recommended schematic ............................................................. 15 ? outline dimensions ....................................................................... 16 ? ordering guide .......................................................................... 16 ? automotive products ................................................................. 16 ? revision history 10/15rev. b to rev. c changes to table 2 .......................................................................... 10 7/15revision b: initial version
data sheet ADUCM330/aducm331 rev. c | page 3 of 16 general description the ADUCM330 / aducm331 are fully integrated, 8 ksps, data acquisition systems that incorporate dual, high performance multichannel sigma-delta (-) adcs, a 32-bit arm? cortex?-m3 processor, and flash. the ADUCM330 has 96 kb program flash and the aducm331 has 128 kb program flash. both devices have 4 kb data flash. the ADUCM330 / aducm331 are complete system solutions for battery monitoring in 12 v automotive applications. the ADUCM330 / aducm331 integrate all of the required features to precisely and intelligently monitor, process, and diagnose 12 v battery parameters including battery current, voltage, and temperature over a wide range of operating conditions. minimizing external system components, the devices are powered directly from a 12 v battery. on-chip, low dropout (ldo) regulators generate the supply voltage for two integrated - adcs. the adcs precisely measure battery current, voltage, and temperature to characterize the state of the health and the charge of the car battery. the devices operate from an on-chip, 16.384 mhz high frequency oscillator that supplies the system clock. this clock is routed through a programmable clock divider from which the core clock operating frequency is generated. the devices also contain a 32 khz oscillator for low power operation. the analog subsystem consists of an adc with a programmable gain amplifier (pga) that allows the monitoring of various current and voltage ranges. it also includes a precision reference on chip. the ADUCM330 / aducm331 integrate a range of on-chip peripherals that can be configured under core software control as required in the application. these peripherals include a spi serial input/output communication controller, six gpio pins, one general-purpose timer, a wake-up timer, and a watchdog timer. the ADUCM330 / aducm331 are specifically designed to operate in battery-powered applications where low power operation is critical. the microcontroller core can be configured in normal operating mode, resulting in an overall system current con- sumption of <18.5 ma when all peripherals are active. the devices can also be configured in a number of low power operating modes under direct program control, consuming <100 a. the ADUCM330/ aducm331 also include a lin physical interface for single wire, high voltage communications in automotive environments. the devices operate from an external 3.6 v to 18 v (on vdd, pin 26) voltage supply and is specified over the ?40c to +115c temperature range, with additional typical specifications at +115c to +125c. the information in this data sheet is relevant for silicon revisions l6x, where x represents a number between 0 and 9. for more information and register details for the ADUCM330 / aducm331 , see the user guide ADUCM330 / aducm331 hardware reference manual , ug-716.
ADUCM330/aducm331 data sheet rev. c | page 4 of 16 specifications vdd = 3.6 v to 18 v, f core = 16.384 mhz, cd = 0, normal mode, vref = 1.2 v (internal), unless otherwise noted. typical values noted reflect the approximate parameter mean at t a = 25c under nominal conditions, unless otherwise stated. parameters not specified in the 115c to 125c temperature range of operation are functional within this range but with degrade d performance table 1. t a = ?40c to +115c t a = +115c to +125c 1 parameter test conditions/comments min typ max typ unit adc specifications conversion rate 1 adc normal operating mode 4 8000 hz adc low power mode, chop on 1 656 hz current channel (iin+/iin? only) no missing codes 1 valid for all adc update rates and adc modes 20 bits integral nonlinearity 1, 2 10 200 80 ppm of fsr positive integral nonlinearity (inl) 1, 2, 3 200 80 ppm of fsr negative inl 1, 2, 3 200 80 ppm of fsr offset error 1, 4, 5 chop off, gain = 4, 8, or 16, external short, after user system calibration at 25c, 1 lsb = (2.28/gain) v ?100 24 +100 lsbs chop off, gain = 32 or 64, external short, after user system calibration at 25c, 1 lsb = (2.28/gain) v ?160 48 +160 lsbs chop off, gain = 512, external short, after user system calibration at 25c, 1 lsb = (2.28/gain) v ?1400 60 +1400 lsbs chop on, external short, low power mode, gain = 64 or 512, processor powered down ?300 50 +250 250 nv chop on, external short, after user system calibration at 25c, vdd = 18 v ?1.5 +1.5 0.1 v offset error drift 1, 2, 6 chop off, gains of 4 to 64, normal mode 0.48 lsb/c chop on 5 5 nv/c total gain error 1, 4, 5, 7 factory calibrated at a gain of 8, normal mode ?0.5 0.1 +0.5 0.15 % low power mode ?1 0.2 +1 0.2 % gain drift 1, 8 3 3 ppm/c pga gain mismatch error 0.1 0.1 % output noise 1 adc0con[11:10], pgascale = 0x3 gain = 64, adcflt = 0x08101 0.80 1.3 1.2 v rms gain = 64, adcflt = 0x00007 0.75 1.1 v rms gain = 32, adcflt = 0x08101 1.00 1.5 1.3 v rms gain = 32, adcflt = 0x00007 0.80 1.2 v rms gain = 16, adcflt = 0x08101 1.50 2.6 2.0 v rms gain = 16, adcflt = 0x00007 1.10 1.9 v rms gain = 8, adcflt = 0x08101 2.10 4.1 2.5 v rms gain = 8, adcflt = 0x00007 1.60 2.4 v rms gain = 4, adcflt = 0x08101 3.40 5.1 4.0 v rms gain = 4, adcflt = 0x00007 2.60 3.9 v rms gain = 64, adcflt = 0x10001 1.60 3 2.0 v rms gain = 32, adcflt = 0x10001 1.70 3.45 2.1 v rms gain = 16, adcflt = 0x10001 2.00 4.2 2.2 v rms gain = 8, adcflt = 0x100 01 2.40 5.1 3.2 v rms gain = 4, adcflt = 0x100 01 4.35 9.6 5.5 v rms adc low power mode, 221 hz update rate, chop enabled, gain = 64 0.6 0.9 0.8 v rms
data sheet ADUCM330/aducm331 rev. c | page 5 of 16 t a = ?40c to +115c t a = +115c to +125c 1 parameter test conditions/comments min typ max typ unit voltage channel 1, 9 no missing codes valid at all adc update rates 20 bits inl from 6 v to 18 v 10 350 150 ppm of fsr offset error 4, 5 chop off, 1 lsb = 27.4 v, after two point calibration ?160 16 +160 lsb chop on, after two-point calibration, offset measured using 0 v differential into voltage adc (vadc) auxiliary pins ?16 4.8 +16 4.8 lsb offset error drift 6 chop off 0.48 1 lsb/c total gain error 4, 5, 7 includes resistor mismatch ?0.25 0.06 +0.25 0.1 % t a = ?25c to +65c ?0.15 0.03 +0.15 % gain drift 8 includes resistor mismatch drift 3 3 ppm/c output noise 10 10 hz update rate, chop on 50 80 v rms adcflt = 0x00007 180 270 v rms adcflt = 0x08101 280 350 300 v rms adcflt = 0x10001 400 730 470 v rms temperature channel 1 no missing codes valid at all adc update rates 20 bits inl 10 60 15 ppm of fsr offset error 4, 11 chop off, 1 lsb = 1.14 v (unipolar mode), after two point calibration ?160 48 +160 lsb offset error 4 chop on ?80 +16 +80 16 lsb offset error drift chop o ff 0.48 0.48 lsb/c total gain error 4, 11 ?0.25 0.06 +0.25 0.10 % gain drift 8 3 3 ppm/c output noise 1 khz update rate, adcflt = 0x00007 7.5 11.25 10 v rms adc specifications, analog input pgascale[11:10] = 0x2 current channel 1 absolute input voltage range applies to both iin+ and iin? ?200 +300 mv input voltage range 12 gain = 4, limited by absolute input voltage range 300 mv gain = 8 150 mv gain = 32 37.5 mv input leakage current 13 ?3 +3 0.2 na input offset current 13 0.2 0.6 0.4 na voltage channel absolute input voltage range 1 voltage adc specifications are valid in this range 6 18 v input voltage range 1 0 to 28.8 v vbat input current vbat = 18 v 5 9 13 11 a temperature channel vref = (avdd18, gnd_sw) absolute input voltage range 1, 14 100 1500 mv input voltage range 1 0 to 1.4 v vtemp input current 1 2.5 10 na voltage reference internal reference 1.2 1.2 v power-up time 1 0.5 0.5 ms initial accuracy 1 measured at t a = 25c ?0.15 +0.15 % temperature coefficient 1, 15 ?20 5 +20 8 ppm/c long-term stability 16 100 ppm/1000 hr
ADUCM330/aducm331 data she et rev. c | page 6 of 16 t a = ?40c to +115c t a = +115c to +125c 1 parameter test conditions/comments min typ max typ unit adc diagnostics avdd18/136 accuracy 1 , 2 , 17 at any gain setting 12 14 13 mv voltage attenuator current source accuracy differential voltage increase on the attenuator when current is on 2.4 3.2 2.8 v resistive attenuator divider ratio 24 resistor mismatch drift implicit in the voltage channel gain error specification 3 ppm/c adc ground switch resistor to ground 45 60 75 k temperature sensor 1 , 18 processor in hibernate mode accuracy t a = 115c to 125c ?3.5 1 +3.5 1 c t a = ?40c to +115c ?3 1 +3 c t a = ?25c to +85c ?2.5 0.5 +2.5 c t a = ?10c to +55c ?2 0.5 +2 c power - on reset (por) 1 refers to voltage at the vdd pin por trip level 2.8 3.1 3.4 3.3 v por hysteresis 0.1 v low voltage flag (lvf) lvf level refers to voltage at the vdd pin 2.6 2.75 3.00 v watchdog timer (wdt) shortest timeout period 32,768 hz clock with a prescaler of 1 30.5 30.5 s longest timeout period 32,768 hz clock with a prescaler of 4096 8192 8192 sec flash/ee memory endurance 19 10,000 cycles data retention 20 20 years logic inputs 1 input voltage low, v inl 0.4 v high, v inh 2.0 v logic outputs 1 all logic outputs, measured with 1 ma load output voltage high, v oh 33vdd ? 0.4 v low, v ol 0.4 v digital inputs 1 all digital inputs except reset , swdio, and swclk logic 1 input current (leakage current) v inh = 3.3 v 1 10 a logic 0 input c urrent (leakage current) v inl = 0 v 1 10 a input capacitance 10 pf on - chip oscillators low frequency oscillator (lfosc) 32,768 hz accuracy 5 % after a calibration from hfosc ?6 +6 % high frequency oscillator (hfosc) 16.384 mhz accuracy (lincal) 1 , 21 ?0.75 0.5 +0.75 % accuracy (high precision mode) ?1 +1 % accuracy (low precision mode) ?3 +3 %
data sheet ADUCM330/aducm331 rev. c | page 7 of 16 t a = ?40c to +115c t a = +115c to +125c 1 parameter test conditions/comments min typ max typ unit processor start - up time 1 at power - on includes kernel power - on execution time, vdd drops to < 0.8 v 18 ms brownout vdd drops below power on reset voltage but not below 0.8 v 1.15 ms after reset event includes kernel power - on execution time 1.25 ms wake - up from lin 0.15 ms lin input/output general 1 baud rate 1000 20,000 bits/sec vdd supply voltage range for which the lin interface is functional 7 18 v lin comparator response time 38 90 s lin dc parameters i lin_dom_max current limit for driver when lin bus is in dominant state, vbat = vbat (maximum) 40 200 ma i lin_pas_rec 1 driver off, 7.0 v < vbus < 18 v, vdd = vlin ? 0.7 v 20 a i lin_pas_dom 1 i nput leakage, vlin = 0 v, vbat = 12 v, driver off ?1 ma i lin_no_gnd 1 , 22 control unit disconnected from ground, gnd = vdd, 0 v < vlin < 18 v, vbat = 12 v ?1 +1 ma i bus_no_bat 1 vbat disconnected, vdd = gnd, 0 v < vbus < 18 v 30 a v lin_dom 1 lin receiver dominant state, vdd > 7.0 v 0.4 vdd v v lin_rec 1 lin receiver recessive state, vdd > 7.0 v 0.6 vdd v v lin_cnt 1 v lin_cnt = (v th_dom + v th_rec )/2, vdd > 7.0 v 0.475 vdd 0.5 vdd 0.525 vdd v v hys 1 v hys = v th_rec ? v th_dom 0.175 vdd v v lin_dom_drv_losup 1 lin dominant output voltage, vdd = 7.0 v r l = 500 1.2 v r l = 1000 0.6 v v lin_dom_drv_hisup 1 lin dominant output voltage, vdd = 18 v r l = 500 2 v r l = 1000 0.8 v v lin_recessive 1 lin recessive output voltage 0.8 vdd v vbat shift 1 , 22 0 0.115 vdd v gnd shift 1 , 22 0 0.115 vdd v r slave slave termination resistance 20 30 47 30 k v serial_diode 1 voltage drop at the serial diode, dser_int 0.4 0.7 1 v
ADUCM330/aducm331 data she et rev. c | page 8 of 16 t a = ?40c to +115c t a = +115c to +125c 1 parameter test conditions/comments min typ max typ unit lin ac parameters 1 bus load conditions (cbus||rbus): 1 nf||1 k , 6.8 nf||660 , 10 nf||500 d1 duty cycle 1 0.396 threc(max) = 0.744 vbat thdom(max) = 0.581 vbat vsup = 7.0 v to 18 v, t bit = 50 s d1 = t bus_rec(min) /(2 t bit ) d2 duty cycle 2 0.581 threc(min) = 0.284 vbat thdom(min) = 0.422 vbat vsup = 7.0 v to 18 v, t bit = 50 s d2 = t bus_rec(max) /(2 t bit ) d3 22 threc(max) = 0.778 vbat 0.417 thdom(max) = 0.616 vbat vdd = 7.0 v to 18 v t bit = 96 s d3 = t bus_rec(min) /(2 t bit ) d4 22 threc(min) = 0.389 vbat 0.590 thdom(min) = 0.251 vbat vdd = 7.0 v to 18 v t bit = 96 s d4 = t bus_rec(max) /(2 t bit ) t rx_pdr 22 propagation delay of receiver 6 s t rx_sym 22 symmetry of receiver propagation delay rising edge, with respect to falling edge (t rx_sym = t rf_pdr ? t rx_pdf ) ?2 +2 s package thermal specificatio ns thermal impedance ( ja ) 23 jedec 4 - layer board 40 c/w power requirements power supply voltages vdd ( pin 26) 3.6 18 v dvdd33 (pin 21) 3.3 3.3 v avdd18 (pin 19) 1.88 1.88 v dvdd18 (pin 22) 1.88 1.88 v power consumption idd (processor normal mode) 24 cd0 (pclk = 16 mhz), 16 mhz 1% mode, adcs off, reference buffer off, executing code from program flash 8 17 9 ma cd1 (pclk = 8 mhz), 16 mhz 1% mode, adcs off, reference buffer off, executing code from program flash 6 7 ma cd0 (pclk = 16 mhz), 16 mhz 1% mode, adcs on, reference buffer on, executing code from program flash 9.5 18.5 10 ma idd (processor powered down) precision oscillator off, adc off, external lin master pull - up resistor present, measured with wake - up and watchdog timers clocked from low power oscillator, maximum value is at 105c, and vdd = 18 v 60 100 a idd lin 500 a idd iadc gain = 4, 8, or 16 700 a gain = 32 or 64 800 a lpm, gain = 64 350 a
data sheet ADUCM330/aducm331 rev. c | page 9 of 16 t a = ?40c to +115c t a = +115c to +125c 1 parameter test conditions/comments min typ max typ unit idd adc1 vadc 550 a idd internal reference (1.2 v) 150 a idd hfosc reduction from 1% to 3% mode 50 a 1 not guara nteed by production test, but by design and/or characterization data at production release. 2 valid for pga current adc gain settings of 4, 8, 16, 32, and 64. 3 system chopping enabled. 4 these specifications include temperature drift. 5 a user system calibration removes this error at a given temperature (and at a given gain for the current channel). 6 the offset error drift is included in the offset error. this typical specification is an indicator of the offset error due to temperature drift. this typical value is the mean of the temperature drift characterization data distribution. 7 includes internal reference temperature drift. 8 the gain drift is included in the total gain error. this typical specification is an indicator of the gai n error due to the temperature drift in the adc. this typical value is the mean of the temperature drift characterization data distribution. 9 voltage channel specifications include resistive attenuator input stage , unless otherwise stated . 10 rms noise is referred to voltage attenuator input; for example, at f adc = 1 khz, the typical rms noise at the adc input is 7.5 v, scaling by the attenuator (24) yields these input referred noise figures. 11 valid after an initial self calibration. 12 it is possible to e xtend the adc input range by up to 10% by modifying the factory set value of the gain calibration register or using system ca libration. this approach can also be used to reduce the adc input range (lsb size). 13 valid for a differential input less than 10 m v . 14 the absolute value of the voltage of vtemp and gnd_sw must be 100 mv (minimum) for accurate operation of the temperature analog - to - digital converter ( t - adc). 15 measured using box method . 16 the long - term stability specification is accelerated and noncumulative. the drift in subsequent 1000 hour periods is significantly low er than in the first 1000 hour period. 17 valid after an initial self gain calibration. 18 die temperature. 19 endurance is qualified to 10,000 cycles, as per jedec standard 22 method a117 and measured at ?40c, +25 c, and +115c. typical endurance at +25c is 100k cycles. 20 data r etention lifetime equivalent at junction temperature (t j ) = 85c, as per jedec standard 22 method a117 . data retention lifetime derates with junction temperature. 21 measured w ith lin communication active. 22 these specifications are not production tested but are supported by lin compliance testing. 23 thermal impedance can be used to calculate the therm al gradient from ambient to die temperature. 24 typical additional supply current consumed during flash/ee memory program and erase cycles is 3 ma and 1 ma, respectively.
ADUCM330/aducm331 data she et rev. c | page 10 of 16 absolute maximum rat ings the ADUCM330 / aducm331 operate directly fr om the 12 v battery supply and is fully specified over the ? 40c to +115c temperature range, unless otherwise noted. table 2 . parameter rating agnd to dgnd to vss to io_vss ?0.3 v to +0.3 v vbat to agnd ?22 v to +40 v vdd to vss ?0.3 v to +40 v lin to io_vss ?18 v to +40 v digital input/output voltage to dgnd ?0.3 v to dvdd33 + 0.3 v adc inputs to agnd ?0.3 v to avdd18 + 0.3 v esd (human body model) rating hbm - adi0082 (based on ansi / esd stm5.1 - 2007) all pins except lin and vbat 2.0 kv lin 6 kv vbat 4 kv iec 61000 -4 - 2 lin and vbat 8 kv storage temperature range ?5 5 c to +150c junction temperature transient 150c continuous 130c lead temperature soldering reflow 1 260c lifetime 2 normal mode 480 hours at ?40c 1600 hours at +23c 5200 hours at +60c 640 hours at +85c 80 hours at +105c standby mode 12,648 hours at ?40c 60,000 hours at +2 5 c 50,000 hours at + 50c 1 jedec standard j - std - 020. 2 using an activation energy of 0. 7 ev, verified using high temperature operating life ( htol ) at 1 2 5c for 1000 hours. stresses at or above those listed under absolute maximum ratings may cause permanent damage to the product. this is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. operation beyond the maximum operatin g conditions for extended periods may affect product reliability. esd caution
data sheet ADUCM330/aducm331 rev. c | page 11 of 16 pin configuration an d function descripti ons notes 1. dnc = do not connect. do not connect this pin. 2. it is recommended that the exposed pad be soldered to ground for thermal reasons. 1 dnc 2 dgnd 3 dvdd18 4 dvdd33 5 33vdd 6 avdd18 7 agnd 8 vref 24 23 22 21 20 19 18 17 reset swdio swclk gpio0/cs/lin_rx gpio1/sclk/lin_tx gpio2/miso gpio3/irq0/mosi/lc_tx/lin_tx gpio4/irq1/lc_rx/eclkin/lin_rx 9 10 11 12 13 14 15 16 gnd_sw vtemp iin+_aux iin+ iin? iin?_aux vinp_aux vinm_aux 32 31 30 29 28 27 26 25 gpio5/lc_tx/lin_tx dgnd vss io_vss lin vbat vdd dgnd top view (not to scale) ADUCM330/ aducm331 11153-005 figure 2 . pin configuration table 3 . pin function descriptions pin no. mnemonic type 1 description 1 reset i reset input pin. active low. this pin has an internal pull - up resistor to 33vdd. 2 swdio i/o cortex - m3 debug data input and output channel. at power - on, this output is disabled and pulled high via an internal pull - up resistor. this pin can be left unconnected when not in use. 3 swclk i cortex - m3 debug clock input. this is an input pin only and has an internal pull- up resistor. this pin can be left unconnected when not in use. 4 gpio0/ cs /lin_rx i/o general - purpose input/output 0 (p0.0) (gpio0). by default, this pin is configured as an input. the pin has an internal 25 k p ull - up resistor to 33vdd and, when not in use, can be left unconnected. chip select ( cs ). when configured, this pin also operates the spi chip select input. local interconnect network receiver (rx) (lin_rx). this pin can be configured as the rx pin for lin frames in external transceiver mode. 5 gpio1/sclk/lin_tx i/o general - purpose input/output 1 (p0.1) (gpio1). by default, this pin is configured as an input. this pin is used by the kernel in external mode. see the ADUCM330 / aducm331 hardware reference manual for more information. the pin has an internal 25 k pull - up resistor to 33vdd and, when not in use, can be left unconnected. serial clock input (sclk). when configured, this pin operates the spi serial clock input. local interconnect network transmitter (tx) (lin_tx). this pin can be configured as the tx pin for lin frames in external transceiver mode. 6 gpio2/miso i/o general - purpose input/output 2 (p0.2) (gpio2). by default, this pin is configured as an input. the pin has an internal 25 k pull - up resistor to 33vdd and, when not in use, can be left unconnected. master input/slave output (miso). when configured, this pin also operates the spi master input/slave output. 7 gpio3/irq0/mosi/ lc_tx/lin_tx i/o general - purpose input/output 3 (p0.3) (gpio3). by default, this pin is configured as an input. this pin is used by the kernel in external mode. see the ADUCM330 / aducm331 hardware reference manual for more information. the pin has an internal 25 k pull - up resistor to 33vdd and, when not in use, can be left unconnected. interrupt request (irq0). this pin can also be configured as external interrupt request 0. master output/slave input (mosi). this p in can be configured as an spi master output/slave input pin. lin conformance tx (lc_tx). this pin can be connected to the lin physical tx for lin conformance testing. local interconnect network tx (lin_tx). this pin can also be connected as the tx pin for lin frames in external transceiver mode.
ADUCM330/aducm331 data she et rev. c | page 12 of 16 pin no. mnemonic type 1 description 8 gpio4/irq1/lc_rx/ eclkin/lin_rx i/o general - purpose input/output 4 (p0.4) (gpio4). by default, this pin is configured as an input. this pin is used by the kernel in external mode. see the ADUCM330 / aducm331 hardware reference manual for more information. the pin has an internal 25 k pull - up resistor to 33vdd and, when not in use, can be left unconnected. interrupt request (irq1). this pin can be configured as external interrupt request 1. lin conformance rx (lc_rx). this pin can be connected to lin physical rx for lin conformance testing. external clock (eclkin). this pin can be configured as the external clock input. local interconnect network rx (lin_rx). this pin can be configured as the receiving pin for lin frames in external transceiver mode. 9 gnd_sw i switch to internal analog ground reference. this pin is the negative input for the external temperature channel. 10 vtemp i external pin for negative temperature coefficient (ntc)/positive temperature coefficient (ptc) temperature measurement. 11 iin+_aux s auxiliary iin+ pin. connect this pin to agnd. 12 iin+ i positive differential input for current channel. 13 iin? i negative differential input for current channel. 14 iin?_aux s auxiliary iin? pin. connect this pin to agnd. 15 vinp_aux s auxiliary input voltage positive channel. connect this pin to agnd. 16 vinm_aux s auxiliary input voltage negative channel. connect this pin to agnd. 17 vref s voltage reference pin. connect this pin via a 470 nf capacitor to ground. this pin can also be used to input an external voltage reference. this pin cannot be used to supply an external circuit. 18 agnd s ground reference for on - chip precision analog circ uits. 19 avdd18 s supply from analog ldo. do not connect this pin to an external circuit. 2 20 33vdd s 3.3 v supply. connect to pin 21. do not connect this pin to an external circuit. 2 21 dvdd33 s 3.3 v supply. connect to pin 20. do not connect this pin to an external circuit. 2 22 dvdd18 s 1.8 v supply. do not connect this pin to an external circuit. 2 23 dgnd s ground reference for on - chip digital circuits. 24 dnc do not connect. this pin is internally connected; therefore, do not externally connect to this pin. 25 dgnd s ground reference for on - chip digital circuits. 26 vdd s battery power supply for on - chip regulator. 27 vbat s battery voltage input fo resistor divider. 28 lin i/o local interconnect network (lin) physical interface input/output. 29 io_vss s ground reference for the lin pin. 30 vss s ground reference. this is the ground reference for the internal voltage regulators. 31 dgnd s ground reference for on - chip digital circuits. 32 gpio5/lc_tx/lin_tx i/o general - purpose input/output 5 (p0.5) (gpio5). by default, this pin is configured as an input. this pin is checked by the kernel on every reset. see the ADUCM330 / aducm331 hardware reference manual for further information. the pin has an internal 25 k pull - up resistor to 33vdd and , when not in use, can be left unconnected. lin conformance tx (lc_tx). this pin can be connected to the lin physical tx for lin conformance testing. local interconnect network tx (lin_tx). this pin can be configured as the tx pin for lin frames in external transceiver mode. 33 epad exposed pad. it is recommended that the exposed pad be soldered to ground for thermal reasons. 1 i is input, o is output, and s is supply . 2 using the 1.8 v or 3.3 v supply to power an external circuit can have por, emc , and se lf heating implications. device evaluation and testing completed without an external load attached.
data sheet ADUCM330/aducm331 rev. c | page 13 of 16 terminology conversion rate the conversion rate specifies the rate at which an output result is available from the adc, after the adc has settled. the - conversion techniques used on this device means that although the adc front-end signal is oversampled at a relatively high sample rate, a subsequent digital filter is used to decimate the output, giving a valid 20-bit data conversion result at output rates from 1 hz to 8 khz. note that, when software switches from one input to another (on the same adc), the digital filter must first be cleared and then allowed to average a new result. depending on the con- figuration of the adc and the type of filter, this averaging can require multiple conversion cycles. integral nonlinearity (inl) inl is the maximum deviation of any code from a straight line passing through the endpoints of the transfer function. the endpoints of the transfer function are zero scale, a point ? lsb below the first code transition, and full scale, a point ? lsb above the last code transition (111110 to 111111). the error is expressed as a percentage of full scale. positive inl is defined as the deviation from a straight line through ? lsb above midscale code transition to ? lsb above the last code transition. negative inl is defined as the deviation from a straight line from a point ? lsb below the first code transition to a point ? lsb above the midscale code transition. no missing codes no missing codes is a measure of the differential nonlinearity of the adc. the error is expressed in bits and specifies the number of codes (adc results) as 2 n bits, where n = no missing codes, guaranteed to occur through the full adc input range. offset error offset error is the deviation of the first code transition adc input voltage from the ideal first code transition. offset error drift offset error drift is the variation in absolute offset error with respect to temperature. this error is expressed as lsb/c or nv/c. gain error gain error is a measure of the span error of the adc. it is a measure of the difference between the measured and the ideal span between any two points in the transfer function. output noise the output noise is specified as the standard deviation (or 1 ) of adc output codes distribution collected when the adc input voltage is at a dc voltage. it is expressed as v rms or nv rms. the output, or rms noise, is used to calculate the effective resolution of the adc as defined by the following equation: effective resolution = log 2 ( full-scale range/rms noise ) bits the peak-to-peak noise is defined as the deviation of codes that fall within 6.6 of the distribution of adc output codes collected when the adc input voltage is at dc. the peak-to-peak noise is therefore calculated as 6.6 the rms noise. the peak-to-peak noise can be used to calculate the adc (noise free, code) resolution for which there is no code flicker within a 6.6 limit as defined by the following equation: noise free code resolution = log 2 ( full-scale range / peak- to-peak noise ) bits
ADUCM330/aducm331 data she et rev. c | page 14 of 16 applications informa tion d esign guidelines before starting design and layout of the ADUCM330 / aducm331 on a printed circuit board (pcb) , it is recommended that the designer become familiar with the following guidelines that describe any special circuit considerations and layout requirements needed . power and ground recommendations place capacitors that are connecting to the ADUCM330 / aducm331 as close to the pins o f the device as po ssible, with minimal trace length. capacitors connected to the 33vdd, avdd18, and dvdd18 pins must have a low equivalent series resistance (esr) rating. all components must be rated accordingly to the temperature range expected by the application. exposed pad thermal recommendations it is required that the exposed pad on the underside of the ADUCM330 / aducm331 be connected to ground to achieve the best e lectrical and thermal performance. it is recommended that the user connect an e xposed continuous copper plane on the pcb to the ADUCM330 / aducm331 exposed pad, and that the copper plane h as several vias to achieve the lowest possible resistive thermal path for heat dissipation to flow through the bottom of the pcb. it is recommend ed that these vias be solder filled or plugged. general recommendations it is highly recommended to use the schematic given with component values specified (see figure 3 ). the component value s shown in figure 3 are chosen from the characterization tests a nd evaluat ed for optimum performance of the ADUCM330 / aducm331 . configure the gpios as inputs with pull - up resistors enabled to obtain the lowest possible current consumption in hibernate mode. set the cortex - m3 core clock speed to the minimum required to meet the application requirements.
data sheet ADUCM330/aducm331 rev. c | page 15 of 16 recommended schemati c figure 3 shows exte rnal components recommended for proper operation of the ADUCM330 / aducm331 . 11153-003 *lin 2.2 physical test passed with 220pf capacitor. 27 26 12 13 31 dgnd 33 epad 29 io_vss 30 vss 23 dgnd 18 agnd 24 dnc 25 dgnd 10f 10nf 100nf 100nf 100nf 10nf 1nf 10nf iin? 14 iin?_aux 11 iin+_aux 17 vref 15 vinp_aux 16 vinm_aux iin+ 100? shunt vbat vdd vbat 4 5 gpio1/sclk/lin_tx 6 gpio2/miso 7 gpio3/irq0/mosi/lc_tx/lin_tx 8 gpio4/irq1/lc_rx/eclkin/lin_rx 32 gpio5/lc_tx/lin_tx 2 swdio 3 swclk 10 avdd18 vtemp 9 gnd_sw 20 28 1 33vdd 21 dvdd33 lin reset dvdd33 1f * 22 dvdd18 0.47f 0.47f 19 avdd18 100nf 1k? ecu master pesd1lin (optional) lin 220? 100k? 220? 1k? 10k? ntc 0.47f ADUCM330/ aducm331 optional gpio0/cs/lin_rx figure 3 . recommended schematic
ADUCM330/aducm331 data sheet rev. c | page 16 of 16 outline dimensions 1 0.50 bsc pin 1 indicator 32 9 16 17 24 25 8 p i n 1 i n d i c a t o r seating plane 0.05 max 0.02 nom 0.15 ref coplanarity 0.08 0.30 0.25 0.18 6.10 6.00 sq 5.90 1.00 0.95 0.85 for proper connection of the exposed pad, refer to the pin configuration and function descriptions section of this data sheet. 0.70 0.60 0.50 0.20 min * 3.90 3.80 sq 3.70 * compliant to jedec standards mo-220-vjjd-7 with the exception of the exposed pad dimension. 07-14-2014-d top view exposed pad bottom view pkg-003499/3916 figure 4. 32-lead lead frame chip scale package [lfcsp_vq] 6 mm 6 mm body, very thin quad (cp-32-15) dimensions shown in millimeters ordering guide model 1, 2 temperature range 3 program flash/ data flash/sram package description package option ADUCM330wdcpz ?40c to +115c 96 kb/4 kb/6 kb 32-le ad frame chip scale package [lfcsp_vq] cp-32-15 ADUCM330wdcpz-rl ?40c to +115c 96 kb/4 kb/6 kb 32- lead frame chip scale package [lfcsp_vq] cp-32-15 aducm331wdcpz ?40c to +115c 128 kb/4 kb/6 kb 32-le ad frame chip scale package [lfcsp_vq] cp-32-15 aducm331wdcpz-rl ?40c to +115c 128 kb/4 kb/6 kb 32- lead frame chip scale package [lfcsp_vq] cp-32-15 eval-aducm331qspz socketed evalua tion board with switches and leds 1 z = rohs compliant part. 2 w = qualified for auto motive applications. 3 the ADUCM330 / aducm331 are functional but have degraded performance at temperatures from 115c to 125c. automotive products the ADUCM330w / aducm331w models are available with controlled manufacturing to support the quality and reliability requirements of automotive applications. note that these automotive models may have specifications that differ from the commercial models; t herefore, designers should review the specifications section of this data sheet carefully. only the automotive grade products shown are a vailable for use in automotive applications. contact your local analog devices account representative for specific product ordering informat ion and to obtain the specific automotive reliability reports for these models. ?2015 analog devices, inc. all rights reserved. trademarks and registered trademarks are the prop erty of their respective owners. d11153-0-10/15(c)

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